Panel/EIDE/.pack/Puya/PY32F0xx_DFP.1.2.19/CMSIS/Debug/PY32F071xx_DBGMCU.ini

// File: PY32F071xx_DBGMCU.ini
// Version: 1.0.0


/* variable to hold register values */
define unsigned long DbgMCU_CR;
define unsigned long DbgMCU_APB_Fz1;
define unsigned long DbgMCU_APB_Fz2;


// <<< Use Configuration Wizard in Context Menu >>>

// <h> Debug MCU configuration register (DBGMCU_CR)
//   <o.1>  DBG_STOP                 <i> Debug stop mode
//   <o.0>  DBG_SLEEP                <i> Debug sleep mode
// </h>
DbgMCU_CR = 0x00000003;

// <h> Debug MCU APB freeze1 register (DBG_APB_FZ1)
//                                   <i> Reserved bits must be kept at reset value
//   <o.31> DBG_LPTIM_STOP           <i> LPTIM stopped when core is halted

//   <o.22> DBG_I2C2_SMBUS_TIMEOUT    <i> I2C2_SMBUS TIMEOUT frozened when core is halted
//   <o.21> DBG_I2C1_SMBUS_TIMEOUT    <i> I2C1_SMBUS TIMEOUT frozened when core is halted

//   <o.12> DBG_IWDG_STOP            <i> Independent watchdog stopped when core is halted
//   <o.11> DBG_WWDG_STOP            <i> Window watchdog stopped when core is halted
//   <o.10> DBG_RTC_STOP             <i> RTC stopped when core is halted

//   <o.5>  DBG_TIM7_STOP            <i> TIM7 counter stopped when core is halted
//   <o.4>  DBG_TIM6_STOP            <i> TIM6 counter stopped when core is halted

//   <o.1>  DBG_TIM3_STOP            <i> TIM3 counter stopped when core is halted
//   <o.0>  DBG_TIM2_STOP            <i> TIM2 counter stopped when core is halted
// </h>
DbgMCU_APB_Fz1 = 0x00000000;

// <h> Debug MCU APB freeze2 register (DBG_APB_FZ2)
//                                   <i> Reserved bits must be kept at reset value
//   <o.18> DBG_TIM17_STOP           <i> TIM17 counter stopped when core is halted
//   <o.17> DBG_TIM16_STOP           <i> TIM16 counter stopped when core is halted
//   <o.16> DBG_TIM15_STOP           <i> TIM15 counter stopped when core is halted
//   <o.15> DBG_TIM14_STOP           <i> TIM14 counter stopped when core is halted

//   <o.11> DBG_TIM1_STOP            <i> TIM1 counter stopped when core is halted
// </h>
DbgMCU_APB_Fz2 = 0x00000000;

// <<< end of configuration section >>>


/*----------------------------------------------------------------------------
  Setup_DBGMCU()  configure DBGMCU registers
 *----------------------------------------------------------------------------*/
FUNC void Setup_DBGMCU (void) {

  _WDWORD(0x40021040, _RDWORD(0x40021040) | 0x00000400);         // Set RCC_APBENR2.DBGMCUEN

  _WDWORD(0x40015804, DBGMCU_CR);                                // Set DBGMCU_CR
  _WDWORD(0x40015808, DbgMCU_APB_Fz1);                           // Set DBG_APB_FZ1
  _WDWORD(0x4001580C, DbgMCU_APB_Fz2);                           // Set DBG_APB_FZ2
}


/*----------------------------------------------------------------------------
  OnResetExec()  Executed after reset via uVision's 'Reset'-button
 *----------------------------------------------------------------------------*/
FUNC void OnResetExec (void) {
  Setup_DBGMCU();
}

Setup_DBGMCU();                                           // Debugger Setup