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PY32F0xx_DFP.1.2.19
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PY32F040xx.dbgconf

PY32F040xx.dbgconf 1.9 KB
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  1. // File: PY32F040xx.dbgconf
    2. 

  2. // Version: 1.0.0
    3. 

  3. 

  4. // <<< Use Configuration Wizard in Context Menu >>>
    5. 

  5. 

  6. // <h> Debug MCU configuration register (DBGMCU_CR)
    7. 

  7. //   <o.1>  DBG_STOP                 <i> Debug stop mode
    8. 

  8. //   <o.0>  DBG_SLEEP                <i> Debug sleep mode
    9. 

  9. // </h>
    10. 

  10. DbgMCU_CR = 0x00000003;
    11. 

  11. 

  12. // <h> Debug MCU APB freeze1 register (DBG_APB_FZ1)
    13. 

  13. //                                   <i> Reserved bits must be kept at reset value
    14. 

  14. //   <o.31> DBG_LPTIM_STOP           <i> LPTIM stopped when core is halted
    15. 

  15. 

  16. //   <o.22> DBG_I2C2_SMBUS_TIMEOUT    <i> I2C2_SMBUS TIMEOUT frozened when core is halted
    17. 

  17. //   <o.21> DBG_I2C1_SMBUS_TIMEOUT    <i> I2C1_SMBUS TIMEOUT frozened when core is halted
    18. 

  18. 

  19. //   <o.12> DBG_IWDG_STOP            <i> Independent watchdog stopped when core is halted
    20. 

  20. //   <o.11> DBG_WWDG_STOP            <i> Window watchdog stopped when core is halted
    21. 

  21. //   <o.10> DBG_RTC_STOP             <i> RTC stopped when core is halted
    22. 

  22. 

  23. //   <o.5>  DBG_TIM7_STOP            <i> TIM7 counter stopped when core is halted
    24. 

  24. //   <o.4>  DBG_TIM6_STOP            <i> TIM6 counter stopped when core is halted
    25. 

  25. 

  26. //   <o.1>  DBG_TIM3_STOP            <i> TIM3 counter stopped when core is halted
    27. 

  27. //   <o.0>  DBG_TIM2_STOP            <i> TIM2 counter stopped when core is halted
    28. 

  28. // </h>
    29. 

  29. DbgMCU_APB_Fz1 = 0x00000000;
    30. 

  30. 

  31. // <h> Debug MCU APB freeze2 register (DBG_APB_FZ2)
    32. 

  32. //                                   <i> Reserved bits must be kept at reset value
    33. 

  33. //   <o.18> DBG_TIM17_STOP           <i> TIM17 counter stopped when core is halted
    34. 

  34. //   <o.17> DBG_TIM16_STOP           <i> TIM16 counter stopped when core is halted
    35. 

  35. //   <o.16> DBG_TIM15_STOP           <i> TIM15 counter stopped when core is halted
    36. 

  36. //   <o.15> DBG_TIM14_STOP           <i> TIM14 counter stopped when core is halted
    37. 

  37. 

  38. //   <o.11> DBG_TIM1_STOP            <i> TIM1 counter stopped when core is halted
    39. 

  39. // </h>
    40. 

  40. DbgMCU_APB_Fz2 = 0x00000000;
    41. 

  41. 

  42. // <<< end of configuration section >>>
    43.