startup_py32f030xx.s 9.4 KB

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  1. /**
  2. ******************************************************************************
  3. * @file startup_py32f030xx.s
  4. * @author MCD Application Team
  5. * @brief PY32F030xx devices vector table GCC toolchain.
  6. * This module performs:
  7. * - Set the initial SP
  8. * - Set the initial PC == Reset_Handler,
  9. * - Set the vector table entries with the exceptions ISR address
  10. * - Branches to main in the C library (which eventually
  11. * calls main()).
  12. * After Reset the Cortex-M0+ processor is in Thread mode,
  13. * priority is Privileged, and the Stack is set to Main.
  14. ******************************************************************************
  15. * @attention
  16. *
  17. * <h2><center>&copy; Copyright (c) 2023 Puya Semiconductor Co.
  18. * All rights reserved.</center></h2>
  19. *
  20. * This software component is licensed by Puya under BSD 3-Clause license,
  21. * the "License"; You may not use this file except in compliance with the
  22. * License. You may obtain a copy of the License at:
  23. * opensource.org/licenses/BSD-3-Clause
  24. *
  25. ******************************************************************************
  26. * @attention
  27. *
  28. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  29. * All rights reserved.</center></h2>
  30. *
  31. * This software component is licensed by ST under BSD 3-Clause license,
  32. * the "License"; You may not use this file except in compliance with the
  33. * License. You may obtain a copy of the License at:
  34. * opensource.org/licenses/BSD-3-Clause
  35. *
  36. ******************************************************************************
  37. */
  38. .syntax unified
  39. .cpu cortex-m0plus
  40. .fpu softvfp
  41. .thumb
  42. .global g_pfnVectors
  43. .global Default_Handler
  44. /* start address for the initialization values of the .data section.
  45. defined in linker script */
  46. .word _sidata
  47. /* start address for the .data section. defined in linker script */
  48. .word _sdata
  49. /* end address for the .data section. defined in linker script */
  50. .word _edata
  51. /* start address for the .bss section. defined in linker script */
  52. .word _sbss
  53. /* end address for the .bss section. defined in linker script */
  54. .word _ebss
  55. /**
  56. * @brief This is the code that gets called when the processor first
  57. * starts execution following a reset event. Only the absolutely
  58. * necessary set is performed, after which the application
  59. * supplied main() routine is called.
  60. * @param None
  61. * @retval None
  62. */
  63. .section .text.Reset_Handler
  64. .weak Reset_Handler
  65. .type Reset_Handler, %function
  66. Reset_Handler:
  67. ldr r0, =_estack
  68. mov sp, r0 /* set stack pointer */
  69. /* Call the clock system initialization function.*/
  70. bl SystemInit
  71. /* Copy the data segment initializers from flash to SRAM */
  72. ldr r0, =_sdata
  73. ldr r1, =_edata
  74. ldr r2, =_sidata
  75. movs r3, #0
  76. b LoopCopyDataInit
  77. CopyDataInit:
  78. ldr r4, [r2, r3]
  79. str r4, [r0, r3]
  80. adds r3, r3, #4
  81. LoopCopyDataInit:
  82. adds r4, r0, r3
  83. cmp r4, r1
  84. bcc CopyDataInit
  85. /* Zero fill the bss segment. */
  86. ldr r2, =_sbss
  87. ldr r4, =_ebss
  88. movs r3, #0
  89. b LoopFillZerobss
  90. FillZerobss:
  91. str r3, [r2]
  92. adds r2, r2, #4
  93. LoopFillZerobss:
  94. cmp r2, r4
  95. bcc FillZerobss
  96. /* Call static constructors */
  97. bl __libc_init_array
  98. /* Call the application s entry point.*/
  99. bl entry
  100. LoopForever:
  101. b LoopForever
  102. .size Reset_Handler, .-Reset_Handler
  103. /**
  104. * @brief This is the code that gets called when the processor receives an
  105. * unexpected interrupt. This simply enters an infinite loop, preserving
  106. * the system state for examination by a debugger.
  107. *
  108. * @param None
  109. * @retval None
  110. */
  111. .section .text.Default_Handler,"ax",%progbits
  112. Default_Handler:
  113. Infinite_Loop:
  114. b Infinite_Loop
  115. .size Default_Handler, .-Default_Handler
  116. /******************************************************************************
  117. *
  118. * The minimal vector table for a Cortex M0. Note that the proper constructs
  119. * must be placed on this to ensure that it ends up at physical address
  120. * 0x0000.0000.
  121. *
  122. ******************************************************************************/
  123. .section .isr_vector,"a",%progbits
  124. .type g_pfnVectors, %object
  125. .size g_pfnVectors, .-g_pfnVectors
  126. g_pfnVectors:
  127. .word _estack
  128. .word Reset_Handler
  129. .word NMI_Handler
  130. .word HardFault_Handler
  131. .word 0
  132. .word 0
  133. .word 0
  134. .word 0
  135. .word 0
  136. .word 0
  137. .word 0
  138. .word SVC_Handler
  139. .word 0
  140. .word 0
  141. .word PendSV_Handler
  142. .word SysTick_Handler
  143. .word WWDG_IRQHandler /* Window WatchDog */
  144. .word PVD_IRQHandler /* PVD through EXTI Line detect */
  145. .word RTC_IRQHandler /* RTC through the EXTI line */
  146. .word FLASH_IRQHandler /* FLASH */
  147. .word RCC_IRQHandler /* RCC */
  148. .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */
  149. .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */
  150. .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */
  151. .word 0 /* reserved */
  152. .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */
  153. .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */
  154. .word 0 /* reserved */
  155. .word ADC_COMP_IRQHandler /* ADC and COMP1 */
  156. .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */
  157. .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
  158. .word 0 /* reserved */
  159. .word TIM3_IRQHandler /* TIM3 */
  160. .word LPTIM1_IRQHandler /* LPTIM1 */
  161. .word 0 /* reserved */
  162. .word TIM14_IRQHandler /* TIM14 */
  163. .word 0 /* reserved */
  164. .word TIM16_IRQHandler /* TIM16 */
  165. .word TIM17_IRQHandler /* TIM17 */
  166. .word I2C1_IRQHandler /* I2C1 */
  167. .word 0 /* reserved */
  168. .word SPI1_IRQHandler /* SPI1 */
  169. .word SPI2_IRQHandler /* SPI2 */
  170. .word USART1_IRQHandler /* USART1 */
  171. .word USART2_IRQHandler /* USART2 */
  172. .word 0 /* reserved */
  173. .word LED_IRQHandler /* LED */
  174. .word 0 /* reserved */
  175. /*******************************************************************************
  176. *
  177. * Provide weak aliases for each Exception handler to the Default_Handler.
  178. * As they are weak aliases, any function with the same name will override
  179. * this definition.
  180. *
  181. *******************************************************************************/
  182. .weak NMI_Handler
  183. .thumb_set NMI_Handler,Default_Handler
  184. .weak HardFault_Handler
  185. .thumb_set HardFault_Handler,Default_Handler
  186. .weak SVC_Handler
  187. .thumb_set SVC_Handler,Default_Handler
  188. .weak PendSV_Handler
  189. .thumb_set PendSV_Handler,Default_Handler
  190. .weak SysTick_Handler
  191. .thumb_set SysTick_Handler,Default_Handler
  192. .weak WWDG_IRQHandler
  193. .thumb_set WWDG_IRQHandler,Default_Handler
  194. .weak PVD_IRQHandler
  195. .thumb_set PVD_IRQHandler,Default_Handler
  196. .weak RTC_IRQHandler
  197. .thumb_set RTC_IRQHandler,Default_Handler
  198. .weak FLASH_IRQHandler
  199. .thumb_set FLASH_IRQHandler,Default_Handler
  200. .weak RCC_IRQHandler
  201. .thumb_set RCC_IRQHandler,Default_Handler
  202. .weak EXTI0_1_IRQHandler
  203. .thumb_set EXTI0_1_IRQHandler,Default_Handler
  204. .weak EXTI2_3_IRQHandler
  205. .thumb_set EXTI2_3_IRQHandler,Default_Handler
  206. .weak EXTI4_15_IRQHandler
  207. .thumb_set EXTI4_15_IRQHandler,Default_Handler
  208. .weak DMA1_Channel1_IRQHandler
  209. .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
  210. .weak DMA1_Channel2_3_IRQHandler
  211. .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
  212. .weak ADC_COMP_IRQHandler
  213. .thumb_set ADC_COMP_IRQHandler,Default_Handler
  214. .weak TIM1_BRK_UP_TRG_COM_IRQHandler
  215. .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler
  216. .weak TIM1_CC_IRQHandler
  217. .thumb_set TIM1_CC_IRQHandler,Default_Handler
  218. .weak TIM3_IRQHandler
  219. .thumb_set TIM3_IRQHandler,Default_Handler
  220. .weak LPTIM1_IRQHandler
  221. .thumb_set LPTIM1_IRQHandler,Default_Handler
  222. .weak TIM14_IRQHandler
  223. .thumb_set TIM14_IRQHandler,Default_Handler
  224. .weak TIM16_IRQHandler
  225. .thumb_set TIM16_IRQHandler,Default_Handler
  226. .weak TIM17_IRQHandler
  227. .thumb_set TIM17_IRQHandler,Default_Handler
  228. .weak I2C1_IRQHandler
  229. .thumb_set I2C1_IRQHandler,Default_Handler
  230. .weak SPI1_IRQHandler
  231. .thumb_set SPI1_IRQHandler,Default_Handler
  232. .weak SPI2_IRQHandler
  233. .thumb_set SPI2_IRQHandler,Default_Handler
  234. .weak USART1_IRQHandler
  235. .thumb_set USART1_IRQHandler,Default_Handler
  236. .weak USART2_IRQHandler
  237. .thumb_set USART2_IRQHandler,Default_Handler
  238. .weak LED_IRQHandler
  239. .thumb_set LED_IRQHandler,Default_Handler