py32f0xx_hal_pwr.h 21 KB

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  1. /**
  2. ******************************************************************************
  3. * @file py32f0xx_hal_pwr.h
  4. * @author MCU Application Team
  5. * @brief Header file of PWR HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2023 Puya Semiconductor Co.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by Puya under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. * @attention
  19. *
  20. * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  21. * All rights reserved.</center></h2>
  22. *
  23. * This software component is licensed by ST under BSD 3-Clause license,
  24. * the "License"; You may not use this file except in compliance with the
  25. * License. You may obtain a copy of the License at:
  26. * opensource.org/licenses/BSD-3-Clause
  27. *
  28. ******************************************************************************
  29. */
  30. /* Define to prevent recursive inclusion -------------------------------------*/
  31. #ifndef __PY32F0xx_HAL_PWR_H
  32. #define __PY32F0xx_HAL_PWR_H
  33. #ifdef __cplusplus
  34. extern "C" {
  35. #endif
  36. /* Includes ------------------------------------------------------------------*/
  37. #include "py32f0xx_hal_def.h"
  38. /** @addtogroup PY32F0xx_HAL_Driver
  39. * @{
  40. */
  41. /** @defgroup PWR PWR
  42. * @brief PWR HAL module driver
  43. * @{
  44. */
  45. /* Exported types ------------------------------------------------------------*/
  46. /** @defgroup PWR_Exported_Types PWR Exported Types
  47. * @{
  48. */
  49. #if defined(PWR_PVD_SUPPORT)
  50. /**
  51. * @brief PWR PVD configuration structure definition
  52. */
  53. typedef struct
  54. {
  55. uint32_t PVDSource; /*!< PVDSource: Specifies the PVD detection source.
  56. This parameter can be a value of @ref PWR_PVD_Source. */
  57. uint32_t PVDFilter; /*!< PVDFilter: Specifies the PVD input filter.
  58. This parameter can be a value of @ref PWR_PVD_Filter. */
  59. uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
  60. This parameter can be a value or a combination of
  61. @ref PWR_PVD_detection_level. */
  62. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
  63. This parameter can be a value of @ref PWR_PVD_Mode. */
  64. } PWR_PVDTypeDef;
  65. #endif
  66. /**
  67. * @brief PWR Stop configuration structure definition
  68. */
  69. typedef struct
  70. {
  71. uint32_t LPVoltSelection; /*!< LPVoltSelection: Set the low power internal regulator output voltage.
  72. This parameter can be a value of @ref PWR_STOP_LPR_Voltage. */
  73. uint32_t RegulatorSwitchDelay; /*!< RegulatorSwitchDelay: Set VDD voltage from LP to MR ready time after wake up.
  74. This parameter can be a value of @ref PWR_STOP_WakeUp_Regulator_Switch_Delay. */
  75. uint32_t WakeUpHsiEnableTime; /*!< WakeUpHsiEnableTime: Set the flash delay time after wake up.
  76. This parameter can be a value of @ref PWR_STOP_WakeUp_HSIEN_Timing. */
  77. uint32_t SramRetentionVolt; /*!< SramRetentionVolt: Set the SRAM retention voltage in stop mode.
  78. This parameter can be a value of @ref PWR_STOP_mode_Sram_Retention_Voltage. */
  79. uint32_t FlashDelay; /*!< FlsahDelay: Set the flash delay time after wake up.
  80. This parameter can be a value of @ref PWR_STOP_WakeUp_Flash_Dealy. */
  81. } PWR_StopModeConfigTypeDef;
  82. /**
  83. * @brief PWR BIAS configuration structure definition
  84. */
  85. typedef struct
  86. {
  87. uint32_t BiasCurrentSource; /*!< BiasCurrentSource: Set the bias currents load source.
  88. This parameter can be a value of @ref PWR_MR_BiasCurrent_Source. */
  89. uint32_t BiasCurrentValue; /*!< BiasCurrentValue: Set the bias currents config value.
  90. This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
  91. } PWR_BIASConfigTypeDef;
  92. /**
  93. * @}
  94. */
  95. /* Exported constants --------------------------------------------------------*/
  96. /** @defgroup PWR_Exported_Constants PWR Exported Constants
  97. * @{
  98. */
  99. #if defined(PWR_PVD_SUPPORT)
  100. /** @defgroup PWR_PVD_Source PWR PVD Source
  101. * @{
  102. */
  103. #define PWR_PVD_SOURCE_VCC (0x00000000u) /*!< PVD detection source is Vcc */
  104. #define PWR_PVD_SOURCE_PB07 (PWR_CR2_SRCSEL) /*!< PVD detection source is PB07 */
  105. /**
  106. * @}
  107. */
  108. /** @defgroup PWR_PVD_Filter PWR PVD Filter
  109. * @{
  110. */
  111. #define PWR_PVD_FILTER_NONE (0x00000000u) /*!< PVD filter disable */
  112. #define PWR_PVD_FILTER_1CLOCK (PWR_CR2_FLTEN | 0x00000000u) /*!< PVD filter 1 clock */
  113. #define PWR_PVD_FILTER_2CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_0) /*!< PVD filter 2 clock */
  114. #define PWR_PVD_FILTER_4CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_1) /*!< PVD filter 4 clock */
  115. #define PWR_PVD_FILTER_16CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_0 | PWR_CR2_FLT_TIME_1) /*!< PVD filter 16 clock */
  116. #define PWR_PVD_FILTER_64CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_2) /*!< PVD filter 64 clock */
  117. #define PWR_PVD_FILTER_128CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_2 | PWR_CR2_FLT_TIME_0) /*!< PVD filter 128 clock */
  118. #define PWR_PVD_FILTER_1024CLOCK (PWR_CR2_FLTEN | PWR_CR2_FLT_TIME_2 | PWR_CR2_FLT_TIME_1) /*!< PVD filter 1024 clock */
  119. /**
  120. * @}
  121. */
  122. /** @defgroup PWR_PVD_detection_level Programmable Voltage Detection levels
  123. * @note see datasheet for selection voltage value
  124. * @{
  125. */
  126. #define PWR_PVDLEVEL_0 (0x00000000u) /*!< same PVD threshold level 0 on rising & falling */
  127. #define PWR_PVDLEVEL_1 (PWR_CR2_PVDT_0) /*!< same PVD threshold level 1 on rising & falling */
  128. #define PWR_PVDLEVEL_2 (PWR_CR2_PVDT_1) /*!< same PVD threshold level 2 on rising & falling */
  129. #define PWR_PVDLEVEL_3 (PWR_CR2_PVDT_0 | PWR_CR2_PVDT_1) /*!< same PVD threshold level 3 on rising & falling */
  130. #define PWR_PVDLEVEL_4 (PWR_CR2_PVDT_2) /*!< same PVD threshold level 4 on rising & falling */
  131. #define PWR_PVDLEVEL_5 (PWR_CR2_PVDT_2 | PWR_CR2_PVDT_0) /*!< same PVD threshold level 5 on rising & falling */
  132. #define PWR_PVDLEVEL_6 (PWR_CR2_PVDT_2 | PWR_CR2_PVDT_1) /*!< same PVD threshold level 6 on rising & falling */
  133. #define PWR_PVDLEVEL_7 (PWR_CR2_PVDT_2 | PWR_CR2_PVDT_1 | PWR_CR2_PVDT_0) /*!< same PVD threshold level 7 on rising & falling */
  134. /**
  135. * @}
  136. */
  137. /** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode
  138. * @{
  139. */
  140. #define PWR_PVD_MODE_NORMAL (0x00000000u) /*!< basic mode is used */
  141. #define PWR_PVD_MODE_IT_RISING (0x00010001u) /*!< External Interrupt Mode with Rising edge trigger detection */
  142. #define PWR_PVD_MODE_IT_FALLING (0x00010002u) /*!< External Interrupt Mode with Falling edge trigger detection */
  143. #define PWR_PVD_MODE_IT_RISING_FALLING (0x00010003u) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
  144. #define PWR_PVD_MODE_EVENT_RISING (0x00020001u) /*!< Event Mode with Rising edge trigger detection */
  145. #define PWR_PVD_MODE_EVENT_FALLING (0x00020002u) /*!< Event Mode with Falling edge trigger detection */
  146. #define PWR_PVD_MODE_EVENT_RISING_FALLING (0x00020003u) /*!< Event Mode with Rising/Falling edge trigger detection */
  147. /**
  148. * @}
  149. */
  150. /** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line
  151. * @{
  152. */
  153. #define PWR_EXTI_LINE_PVD (EXTI_IMR_IM16) /*!< External interrupt line 16 connected to PVD */
  154. /**
  155. * @}
  156. */
  157. /** @defgroup PWR_PVD_EVENT_LINE PWR PVD event line
  158. * @{
  159. */
  160. #define PWR_EVENT_LINE_PVD (EXTI_EMR_EM16) /*!< Event line 16 connected to PVD */
  161. /**
  162. * @}
  163. */
  164. #endif
  165. /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode
  166. * @{
  167. */
  168. #define PWR_MAINREGULATOR_ON (0x00000000u) /*!< Regulator in main mode */
  169. #define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPR /*!< Regulator in low-power mode */
  170. /**
  171. * @}
  172. */
  173. /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
  174. * @{
  175. */
  176. #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01u) /*!< Wait For Interruption instruction to enter Sleep mode */
  177. #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02u) /*!< Wait For Event instruction to enter Sleep mode */
  178. /**
  179. * @}
  180. */
  181. /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
  182. * @{
  183. */
  184. #define PWR_STOPENTRY_WFI ((uint8_t)0x01u) /*!< Wait For Interruption instruction to enter Stop mode */
  185. #define PWR_STOPENTRY_WFE ((uint8_t)0x02u) /*!< Wait For Event instruction to enter Stop mode */
  186. /**
  187. * @}
  188. */
  189. /** @defgroup PWR_Flag PWR Status Flags
  190. * @{
  191. */
  192. #if defined(PWR_PVD_SUPPORT)
  193. #define PWR_FLAG_PVDO (PWR_SR_PVDO) /*!< Power Voltage Detector output */
  194. #endif
  195. /**
  196. * @}
  197. */
  198. /** @defgroup PWR_STOP_LPR_Voltage PWR STOP mode LPR Voltage Selection.
  199. * @{
  200. */
  201. #define PWR_STOPMOD_LPR_VOLT_SCALE1 0x0 /*!< After entering stop mode, VDD=1.2V */
  202. #define PWR_STOPMOD_LPR_VOLT_SCALE2 PWR_CR1_VOS /*!< After entering stop mode, VDD=1.0V */
  203. /**
  204. * @}
  205. */
  206. /** @defgroup PWR_STOP_WakeUp_Regulator_Switch_Delay PWR Stop mode WakeUp Voltage regulators switches from LPR to MR Delay.
  207. * @{
  208. */
  209. #define PWR_WAKEUP_LPR_TO_MR_DELAY_2US 0x00000000U /* Wake up from the STOP mode, LP to VR ready time 2us */
  210. #define PWR_WAKEUP_LPR_TO_MR_DELAY_3US ( PWR_CR1_MRRDY_TIME_0) /* Wake up from the STOP mode, LP to VR ready time 2us */
  211. #define PWR_WAKEUP_LPR_TO_MR_DELAY_4US (PWR_CR1_MRRDY_TIME_1 ) /* Wake up from the STOP mode, LP to VR ready time 2us */
  212. #define PWR_WAKEUP_LPR_TO_MR_DELAY_5US (PWR_CR1_MRRDY_TIME_1 | PWR_CR1_MRRDY_TIME_0) /* Wake up from the STOP mode, LP to VR ready time 2us */
  213. /**
  214. * @}
  215. */
  216. /** @defgroup PWR_STOP_WakeUp_HSIEN_Timing PWR STOP mode WakeUp HSI Enable Timing.
  217. * @{
  218. */
  219. #define PWR_WAKEUP_HSIEN_AFTER_MR 0x00000000U /* Wake up from the STOP mode, After the MR becomes stable, enable HSI */
  220. #define PWR_WAKEUP_HSIEN_IMMEDIATE PWR_CR1_HSION_CTRL /* Wake up from the STOP mode, Enable HSI immediately */
  221. /**
  222. * @}
  223. */
  224. /** @defgroup PWR_STOP_mode_Sram_Retention_Voltage PWR STOP mode Sram Retention Voltage.
  225. * @{
  226. */
  227. #define PWR_SRAM_RETENTION_VOLT_0p9 ( PWR_CR1_SRAM_RETV_1 | PWR_CR1_SRAM_RETV_0) /* Set SRAM to 0.9V voltage in stop mode */
  228. #define PWR_SRAM_RETENTION_VOLT_VOS (PWR_CR1_SRAM_RETV_2 ) /* Set SRAM voltage as set by bit VOS in stop mode */
  229. /**
  230. * @}
  231. */
  232. /** @defgroup PWR_STOP_WakeUp_Flash_Dealy PWR STOP WakeUp Flash Dealy.
  233. * @{
  234. */
  235. #define PWR_WAKEUP_FLASH_DELAY_0US (PWR_CR1_FLS_SLPTIME_1 | PWR_CR1_FLS_SLPTIME_0) /* Wake up from the STOP mode, Enable falsh immediately*/
  236. #define PWR_WAKEUP_FLASH_DELAY_2US ( PWR_CR1_FLS_SLPTIME_0) /* Wake up from the STOP mode, Delay 2us enable falsh*/
  237. #define PWR_WAKEUP_FLASH_DELAY_3US (PWR_CR1_FLS_SLPTIME_1 ) /* Wake up from the STOP mode, Delay 3us enable falsh*/
  238. #define PWR_WAKEUP_FLASH_DELAY_5US 0x00000000U /* Wake up from the STOP mode, Delay 5us enable falsh*/
  239. /**
  240. * @}
  241. */
  242. /** @defgroup PWR_MR_BiasCurrent_Source PWR MainRegulator BiasCurrent Source.
  243. * @{
  244. */
  245. #define PWR_BIAS_CURRENTS_FROM_FACTORY_BYTES 0x00000000U /* MR bias currents source load from Factory config bytes */
  246. #define PWR_BIAS_CURRENTS_FROM_BIAS_CR (PWR_CR1_BIAS_CR_SEL) /* MR bias currents source load from BIAS_CR */
  247. /**
  248. * @}
  249. */
  250. /**
  251. * @}
  252. */
  253. #if defined(PWR_PVD_SUPPORT)
  254. /* Exported macros -----------------------------------------------------------*/
  255. /** @defgroup PWR_Exported_Macros PWR Exported Macros
  256. * @{
  257. */
  258. /** @brief Check whether or not a specific PWR flag is set.
  259. * @param __FLAG__ specifies the flag to check.
  260. * This parameter can be one a combination of following values:
  261. * @arg PWR_FLAG_PVDO: Power Voltage Detector Output. Indicates whether
  262. * VDD voltage is below or above the selected PVD threshold.
  263. * @retval The new state of __FLAG__ (TRUE or FALSE).
  264. */
  265. #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->SR & (__FLAG__)) == (__FLAG__))
  266. /**
  267. * @brief Enable the PVD Extended Interrupt Line.
  268. * @retval None
  269. */
  270. #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
  271. /**
  272. * @brief Disable the PVD Extended Interrupt Line.
  273. * @retval None
  274. */
  275. #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR, PWR_EXTI_LINE_PVD)
  276. /**
  277. * @brief Enable the PVD Event Line.
  278. * @retval None
  279. */
  280. #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR, PWR_EVENT_LINE_PVD)
  281. /**
  282. * @brief Disable the PVD Event Line.
  283. * @retval None
  284. */
  285. #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR, PWR_EVENT_LINE_PVD)
  286. /**
  287. * @brief Enable the PVD Extended Interrupt Rising Trigger.
  288. * @retval None
  289. */
  290. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  291. /**
  292. * @brief Disable the PVD Extended Interrupt Rising Trigger.
  293. * @retval None
  294. */
  295. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  296. /**
  297. * @brief Enable the PVD Extended Interrupt Falling Trigger.
  298. * @retval None
  299. */
  300. #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  301. /**
  302. * @brief Disable the PVD Extended Interrupt Falling Trigger.
  303. * @retval None
  304. */
  305. #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  306. /**
  307. * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger.
  308. * @retval None
  309. */
  310. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
  311. do { \
  312. __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \
  313. __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \
  314. } while(0U)
  315. /**
  316. * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
  317. * @retval None
  318. */
  319. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
  320. do { \
  321. __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
  322. __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
  323. } while(0U)
  324. /**
  325. * @brief Generate a Software interrupt on selected EXTI line.
  326. * @retval None
  327. */
  328. #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER, PWR_EXTI_LINE_PVD)
  329. /**
  330. * @brief Check whether or not the PVD EXTI interrupt flag is set.
  331. * @retval EXTI PVD Line Status.
  332. */
  333. #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & PWR_EXTI_LINE_PVD)
  334. /**
  335. * @brief Clear the PVD EXTI interrupt flag.
  336. * @retval None
  337. */
  338. #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR, PWR_EXTI_LINE_PVD)
  339. /**
  340. * @}
  341. */
  342. #endif /* PWR_PVD_SUPPORT */
  343. /* Private constants-------------------------------------------------------*/
  344. /** @defgroup PWREx_WUP_Polarity Shift to apply to retrieve polarity information from PWR_WAKEUP_PINy_xxx constants
  345. * @{
  346. */
  347. #define PWR_WUP_POLARITY_SHIFT 0x08u /*!< Internal constant used to retrieve wakeup pin polariry */
  348. /**
  349. * @}
  350. */
  351. /* Private macros --------------------------------------------------------*/
  352. /** @defgroup PWR_Private_Macros PWR Private Macros
  353. * @{
  354. */
  355. #if defined(PWR_PVD_SUPPORT)
  356. #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) & ~(PWR_CR2_PVDT)) == 0x00000000u)
  357. #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) || \
  358. ((MODE) == PWR_PVD_MODE_IT_RISING) || \
  359. ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
  360. ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || \
  361. ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
  362. ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || \
  363. ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING))
  364. #endif
  365. #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
  366. ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
  367. #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || \
  368. ((ENTRY) == PWR_SLEEPENTRY_WFE))
  369. #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || \
  370. ((ENTRY) == PWR_STOPENTRY_WFE))
  371. #define IS_PWR_STOP_LPR_VOLT(VOLT) (((VOLT) == PWR_STOPMOD_LPR_VOLT_SCALE1) || \
  372. ((VOLT) == PWR_STOPMOD_LPR_VOLT_SCALE2))
  373. #define IS_PWR_REGULATOR_SWTICH_DELAY(DELAY) (((DELAY) == PWR_WAKEUP_LPR_TO_MR_DELAY_2US) || \
  374. ((DELAY) == PWR_WAKEUP_LPR_TO_MR_DELAY_3US) || \
  375. ((DELAY) == PWR_WAKEUP_LPR_TO_MR_DELAY_4US) || \
  376. ((DELAY) == PWR_WAKEUP_LPR_TO_MR_DELAY_5US))
  377. #define IS_PWR_WAKEUP_HSIEN_TIMING(TIMING) (((TIMING) == PWR_WAKEUP_HSIEN_AFTER_MR) || \
  378. ((TIMING) == PWR_WAKEUP_HSIEN_IMMEDIATE))
  379. #define IS_PWR_SRAM_RETENTION_VOLT(VOLT) (((VOLT) == PWR_SRAM_RETENTION_VOLT_0p9) || \
  380. ((VOLT) == PWR_SRAM_RETENTION_VOLT_VOS))
  381. #define IS_PWR_WAKEUP_FLASH_DELAY(DELAY) (((DELAY) == PWR_WAKEUP_FLASH_DELAY_0US) || \
  382. ((DELAY) == PWR_WAKEUP_FLASH_DELAY_2US) || \
  383. ((DELAY) == PWR_WAKEUP_FLASH_DELAY_3US) || \
  384. ((DELAY) == PWR_WAKEUP_FLASH_DELAY_5US))
  385. #define IS_BIAS_CURRENTS_SOURCE(SOURCE) (((SOURCE) == PWR_BIAS_CURRENTS_FROM_FACTORY_BYTES) || \
  386. ((SOURCE) == PWR_BIAS_CURRENTS_FROM_BIAS_CR))
  387. /**
  388. * @}
  389. */
  390. /* Include PWR HAL Extended module */
  391. /* Exported functions --------------------------------------------------------*/
  392. /** @defgroup PWR_Exported_Functions PWR Exported Functions
  393. * @{
  394. */
  395. /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  396. * @{
  397. */
  398. /* Initialization and de-initialization functions *******************************/
  399. void HAL_PWR_DeInit(void);
  400. /**
  401. * @}
  402. */
  403. /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
  404. * @{
  405. */
  406. /* Peripheral Control functions ************************************************/
  407. void HAL_PWR_EnableBkUpAccess(void);
  408. void HAL_PWR_DisableBkUpAccess(void);
  409. #if defined(PWR_PVD_SUPPORT)
  410. HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
  411. void HAL_PWR_EnablePVD(void);
  412. void HAL_PWR_DisablePVD(void);
  413. #endif
  414. HAL_StatusTypeDef HAL_PWR_ConfigStopMode(PWR_StopModeConfigTypeDef *sStopModeConfig);
  415. HAL_StatusTypeDef HAL_PWR_ConfigBIAS(PWR_BIASConfigTypeDef *sBIASConfig);
  416. /* Low Power modes configuration functions ************************************/
  417. void HAL_PWR_EnterSLEEPMode(uint8_t SLEEPEntry);
  418. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
  419. void HAL_PWR_EnableSleepOnExit(void);
  420. void HAL_PWR_DisableSleepOnExit(void);
  421. void HAL_PWR_EnableSEVOnPend(void);
  422. void HAL_PWR_DisableSEVOnPend(void);
  423. #if defined(PWR_PVD_SUPPORT)
  424. void HAL_PWR_PVD_IRQHandler(void);
  425. void HAL_PWR_PVD_Callback(void);
  426. #endif
  427. /**
  428. * @}
  429. */
  430. /**
  431. * @}
  432. */
  433. /**
  434. * @}
  435. */
  436. /**
  437. * @}
  438. */
  439. #ifdef __cplusplus
  440. }
  441. #endif
  442. #endif /* __PY32F0xx_HAL_PWR_H */
  443. /************************ (C) COPYRIGHT Puya *****END OF FILE****/