u8g2_port.c 13 KB

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  1. #include "u8g2_port.h"
  2. #include <string.h>
  3. #define MAX_RETRY 3
  4. #if defined U8G2_USE_HW_I2C
  5. static struct rt_i2c_bus_device *i2c_bus = RT_NULL;
  6. #endif
  7. #if defined U8G2_USE_HW_SPI
  8. static struct rt_spi_device u8g2_spi_dev;
  9. static inline void u8g2_port_pin_mode(uint8_t pin, rt_uint8_t mode)
  10. {
  11. if(pin != U8X8_PIN_NONE)
  12. {
  13. rt_pin_mode(pin, mode);
  14. }
  15. }
  16. static inline void u8g2_port_pin_write(uint8_t pin, uint8_t value)
  17. {
  18. if(pin != U8X8_PIN_NONE)
  19. {
  20. rt_pin_write(pin, value);
  21. }
  22. }
  23. static inline int u8g2_port_pin_read(uint8_t pin)
  24. {
  25. if(pin != U8X8_PIN_NONE)
  26. {
  27. return rt_pin_read(pin);
  28. }
  29. return 0;
  30. }
  31. int rt_hw_spi_config(uint8_t spi_mode, uint32_t max_hz, uint8_t cs_pin )
  32. {
  33. rt_err_t res;
  34. // Attach Device
  35. u8g2_port_pin_mode(cs_pin, PIN_MODE_OUTPUT);
  36. // spi cs signal will be controlled directly using gpio
  37. if(u8g2_spi_dev.bus == RT_NULL)
  38. {
  39. res = rt_spi_bus_attach_device(&u8g2_spi_dev, U8G2_SPI_DEVICE_NAME, U8G2_SPI_BUS_NAME, RT_NULL);
  40. if (res != RT_EOK)
  41. {
  42. rt_kprintf("[u8g2] Failed to attach device %s\n", U8G2_SPI_DEVICE_NAME);
  43. return res;
  44. }
  45. else
  46. {
  47. rt_kprintf("[u8g2] Attach device to %s\n", U8G2_SPI_DEVICE_NAME);
  48. }
  49. }
  50. else
  51. {
  52. rt_kprintf("[u8g2] Found device %s\n", U8G2_SPI_DEVICE_NAME);
  53. }
  54. // Set device SPI Mode
  55. struct rt_spi_configuration cfg;
  56. cfg.data_width = 8;
  57. switch(spi_mode)
  58. {
  59. case 0: cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_0 | RT_SPI_MSB; break;
  60. case 1: cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_1 | RT_SPI_MSB; break;
  61. case 2: cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_2 | RT_SPI_MSB; break;
  62. case 3: cfg.mode = RT_SPI_MASTER | RT_SPI_MODE_3 | RT_SPI_MSB; break;
  63. }
  64. cfg.max_hz = max_hz; /* 20M,SPI max 42MHz,ssd1351 4-wire spi */
  65. rt_spi_configure(&u8g2_spi_dev, &cfg);
  66. return RT_EOK;
  67. }
  68. #endif /* U8G2_USE_HW_SPI */
  69. uint8_t u8x8_gpio_and_delay_rtthread(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
  70. {
  71. uint8_t i;
  72. switch(msg)
  73. {
  74. case U8X8_MSG_DELAY_NANO: // delay arg_int * 1 nano second
  75. __asm__ volatile("nop");
  76. break;
  77. case U8X8_MSG_DELAY_100NANO: // delay arg_int * 100 nano seconds
  78. __asm__ volatile("nop");
  79. break;
  80. case U8X8_MSG_DELAY_10MICRO: // delay arg_int * 10 micro seconds
  81. for (uint16_t n = 0; n < 320; n++)
  82. {
  83. __asm__ volatile("nop");
  84. }
  85. break;
  86. case U8X8_MSG_DELAY_MILLI: // delay arg_int * 1 milli second
  87. rt_thread_mdelay(arg_int);
  88. break;
  89. case U8X8_MSG_GPIO_AND_DELAY_INIT:
  90. // Function which implements a delay, arg_int contains the amount of ms
  91. // set spi pin mode
  92. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_SPI_CLOCK], PIN_MODE_OUTPUT);
  93. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_SPI_DATA], PIN_MODE_OUTPUT);
  94. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_RESET], PIN_MODE_OUTPUT);
  95. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_DC], PIN_MODE_OUTPUT);
  96. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_CS], PIN_MODE_OUTPUT);
  97. // set i2c pin mode
  98. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_I2C_DATA], PIN_MODE_OUTPUT);
  99. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_I2C_CLOCK], PIN_MODE_OUTPUT);
  100. // set 8080 pin mode
  101. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_D0], PIN_MODE_OUTPUT);
  102. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_D1], PIN_MODE_OUTPUT);
  103. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_D2], PIN_MODE_OUTPUT);
  104. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_D3], PIN_MODE_OUTPUT);
  105. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_D4], PIN_MODE_OUTPUT);
  106. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_D5], PIN_MODE_OUTPUT);
  107. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_D6], PIN_MODE_OUTPUT);
  108. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_D7], PIN_MODE_OUTPUT);
  109. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_E], PIN_MODE_OUTPUT);
  110. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_DC], PIN_MODE_OUTPUT);
  111. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_RESET], PIN_MODE_OUTPUT);
  112. // set menu pin mode
  113. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_MENU_HOME], PIN_MODE_INPUT_PULLUP);
  114. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_MENU_SELECT], PIN_MODE_INPUT_PULLUP);
  115. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_MENU_PREV], PIN_MODE_INPUT_PULLUP);
  116. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_MENU_NEXT], PIN_MODE_INPUT_PULLUP);
  117. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_MENU_UP], PIN_MODE_INPUT_PULLUP);
  118. u8g2_port_pin_mode(u8x8->pins[U8X8_PIN_MENU_DOWN], PIN_MODE_INPUT_PULLUP);
  119. // set value
  120. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_SPI_CLOCK], 1);
  121. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_SPI_DATA], 1);
  122. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_RESET], 1);
  123. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_DC], 1);
  124. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_CS], 1);
  125. break;
  126. case U8X8_MSG_DELAY_I2C:
  127. // arg_int is the I2C speed in 100KHz, e.g. 4 = 400 KHz
  128. // arg_int=1: delay by 5us, arg_int = 4: delay by 1.25us
  129. for (uint16_t n = 0; n < (arg_int<=2?160:40); n++)
  130. {
  131. __asm__ volatile("nop");
  132. }
  133. break;
  134. //case U8X8_MSG_GPIO_D0: // D0 or SPI clock pin: Output level in arg_int
  135. //case U8X8_MSG_GPIO_SPI_CLOCK:
  136. //case U8X8_MSG_GPIO_D1: // D1 or SPI data pin: Output level in arg_int
  137. //case U8X8_MSG_GPIO_SPI_DATA:
  138. case U8X8_MSG_GPIO_D2: // D2 pin: Output level in arg_int
  139. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_D2], arg_int);
  140. break;
  141. case U8X8_MSG_GPIO_D3: // D3 pin: Output level in arg_int
  142. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_D3], arg_int);
  143. break;
  144. case U8X8_MSG_GPIO_D4: // D4 pin: Output level in arg_int
  145. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_D4], arg_int);
  146. break;
  147. case U8X8_MSG_GPIO_D5: // D5 pin: Output level in arg_int
  148. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_D5], arg_int);
  149. break;
  150. case U8X8_MSG_GPIO_D6: // D6 pin: Output level in arg_int
  151. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_D6], arg_int);
  152. break;
  153. case U8X8_MSG_GPIO_D7: // D7 pin: Output level in arg_int
  154. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_D7], arg_int);
  155. break;
  156. case U8X8_MSG_GPIO_E: // E/WR pin: Output level in arg_int
  157. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_E], arg_int);
  158. break;
  159. case U8X8_MSG_GPIO_I2C_CLOCK:
  160. // arg_int=0: Output low at I2C clock pin
  161. // arg_int=1: Input dir with pullup high for I2C clock pin
  162. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_I2C_CLOCK], arg_int);
  163. break;
  164. case U8X8_MSG_GPIO_I2C_DATA:
  165. // arg_int=0: Output low at I2C data pin
  166. // arg_int=1: Input dir with pullup high for I2C data pin
  167. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_I2C_DATA], arg_int);
  168. break;
  169. case U8X8_MSG_GPIO_SPI_CLOCK:
  170. // Function to define the logic level of the clockline
  171. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_SPI_CLOCK], arg_int);
  172. break;
  173. case U8X8_MSG_GPIO_SPI_DATA:
  174. // Function to define the logic level of the data line to the display
  175. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_SPI_DATA], arg_int);
  176. break;
  177. case U8X8_MSG_GPIO_CS:
  178. // Function to define the logic level of the CS line
  179. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_CS], arg_int);
  180. break;
  181. case U8X8_MSG_GPIO_DC:
  182. // Function to define the logic level of the Data/ Command line
  183. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_DC], arg_int);
  184. break;
  185. case U8X8_MSG_GPIO_RESET:
  186. // Function to define the logic level of the RESET line
  187. u8g2_port_pin_write(u8x8->pins[U8X8_PIN_RESET], arg_int);
  188. break;
  189. default:
  190. if ( msg >= U8X8_MSG_GPIO(0) )
  191. {
  192. i = u8x8_GetPinValue(u8x8, msg);
  193. if ( i != U8X8_PIN_NONE )
  194. {
  195. if ( u8x8_GetPinIndex(u8x8, msg) < U8X8_PIN_OUTPUT_CNT )
  196. {
  197. u8g2_port_pin_write(i, arg_int);
  198. }
  199. else
  200. {
  201. if ( u8x8_GetPinIndex(u8x8, msg) == U8X8_PIN_OUTPUT_CNT )
  202. {
  203. // call yield() for the first pin only, u8x8 will always request all the pins, so this should be ok
  204. // yield();
  205. }
  206. u8x8_SetGPIOResult(u8x8, u8g2_port_pin_read(i) == 0 ? 0 : 1);
  207. }
  208. }
  209. break;
  210. }
  211. return 0;
  212. }
  213. return 1;
  214. }
  215. #if defined U8G2_USE_HW_I2C
  216. uint8_t u8x8_byte_rtthread_hw_i2c(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
  217. {
  218. /* u8g2/u8x8 will never send more than 32 bytes between START_TRANSFER and END_TRANSFER */
  219. struct rt_i2c_msg msgs;
  220. static uint8_t buffer[32];
  221. static uint8_t buf_idx;
  222. uint8_t *data;
  223. rt_uint8_t t = 0;
  224. switch(msg)
  225. {
  226. case U8X8_MSG_BYTE_SEND:
  227. data = (uint8_t *)arg_ptr;
  228. while( arg_int > 0 )
  229. {
  230. buffer[buf_idx++] = *data;
  231. data++;
  232. arg_int--;
  233. }
  234. break;
  235. case U8X8_MSG_BYTE_INIT:
  236. i2c_bus = rt_i2c_bus_device_find(U8G2_I2C_DEVICE_NAME);
  237. if (i2c_bus == RT_NULL)
  238. {
  239. rt_kprintf("[u8g2] Failed to find bus %s\n", U8G2_I2C_DEVICE_NAME);
  240. return 0;
  241. }
  242. break;
  243. case U8X8_MSG_BYTE_SET_DC:
  244. break;
  245. case U8X8_MSG_BYTE_START_TRANSFER:
  246. buf_idx = 0;
  247. break;
  248. case U8X8_MSG_BYTE_END_TRANSFER:
  249. if (i2c_bus == RT_NULL)
  250. {
  251. rt_kprintf("[u8g2] Failed to find bus %s\n", U8G2_I2C_DEVICE_NAME);
  252. return 0;
  253. }
  254. // I2C Data Transfer
  255. msgs.addr = u8x8_GetI2CAddress(u8x8)>>1;
  256. msgs.flags = RT_I2C_WR;
  257. msgs.buf = buffer;
  258. msgs.len = buf_idx;
  259. while(rt_i2c_transfer(i2c_bus, &msgs, 1) != 1 && t < MAX_RETRY)
  260. {
  261. t++;
  262. };
  263. if(t >= MAX_RETRY)
  264. {
  265. return 0;
  266. }
  267. break;
  268. default:
  269. return 0;
  270. }
  271. return 1;
  272. }
  273. #endif /* U8G2_USE_HW_I2C */
  274. #if defined U8G2_USE_HW_SPI
  275. uint8_t u8x8_byte_rtthread_4wire_hw_spi(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr) {
  276. struct rt_spi_message spi_msg;
  277. switch(msg)
  278. {
  279. case U8X8_MSG_BYTE_SEND:
  280. spi_msg.send_buf = arg_ptr;
  281. spi_msg.recv_buf = RT_NULL;
  282. spi_msg.length = arg_int;
  283. spi_msg.cs_take = 0;
  284. spi_msg.cs_release = 0;
  285. spi_msg.next = RT_NULL;
  286. rt_spi_transfer_message(&u8g2_spi_dev, &spi_msg);
  287. break;
  288. case U8X8_MSG_BYTE_INIT:
  289. /* SPI mode has to be mapped to the mode of the current controller, at least Uno, Due, 101 have different SPI_MODEx values */
  290. /* 0: clock active high, data out on falling edge, clock default value is zero, takover on rising edge */
  291. /* 1: clock active high, data out on rising edge, clock default value is zero, takover on falling edge */
  292. /* 2: clock active low, data out on rising edge */
  293. /* 3: clock active low, data out on falling edge */
  294. u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level);
  295. rt_hw_spi_config(u8x8->display_info->spi_mode, u8x8->display_info->sck_clock_hz, u8x8->pins[U8X8_PIN_CS]);
  296. break;
  297. case U8X8_MSG_BYTE_SET_DC:
  298. u8x8_gpio_SetDC(u8x8, arg_int);
  299. break;
  300. case U8X8_MSG_BYTE_START_TRANSFER:
  301. rt_spi_take_bus(&u8g2_spi_dev);
  302. u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_enable_level);
  303. u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->post_chip_enable_wait_ns, NULL);
  304. break;
  305. case U8X8_MSG_BYTE_END_TRANSFER:
  306. u8x8->gpio_and_delay_cb(u8x8, U8X8_MSG_DELAY_NANO, u8x8->display_info->pre_chip_disable_wait_ns, NULL);
  307. u8x8_gpio_SetCS(u8x8, u8x8->display_info->chip_disable_level);
  308. rt_spi_release_bus(&u8g2_spi_dev);
  309. break;
  310. default:
  311. return 0;
  312. }
  313. return 1;
  314. }
  315. #endif /* U8G2_USE_HW_SPI */