main.c 4.3 KB

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  1. /* LED blink project for the STM32L031 */
  2. #include "stm32l031xx.h"
  3. /*===============================================*/
  4. /*
  5. systick IRQ
  6. */
  7. volatile unsigned long SysTickCount = 0;
  8. void __attribute__ ((interrupt, used)) SysTick_Handler(void)
  9. {
  10. SysTickCount++;
  11. if ( SysTickCount & 1 )
  12. GPIOA->BSRR = GPIO_BSRR_BS_13; /* atomic set PA13 */
  13. else
  14. GPIOA->BSRR = GPIO_BSRR_BR_13; /* atomic clr PA13 */
  15. }
  16. /*===============================================*/
  17. /*
  18. boost converter
  19. PA6=Output to N-MOS Gate
  20. PA7=Reference Input
  21. */
  22. void boost_converter(void)
  23. {
  24. /* assumes, that SYSCFG_CRGR3 is not locked */
  25. /* assumes, that COMP2 is not locked */
  26. /* setup internal reference */
  27. SYSCFG->CFGR3 |= SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP; /* enable VREFINT during low power mode */
  28. while( (SYSCFG->CFGR3 & SYSCFG_CFGR3_VREFINT_RDYF) == 0 ) /* wait for VREFINT until it becomes ready */
  29. ;
  30. /* setup COMP2 */
  31. /* select PA7 as positive input --> 101 */
  32. COMP2->CSR &= ~(uint32_t)COMP_CSR_COMP2INPSEL;
  33. COMP2->CSR |= COMP_CSR_COMP2INPSEL_0 | COMP_CSR_COMP2INPSEL_2;
  34. /* select 1/4 internal reference voltage --> 0.306 Volt -->100 */
  35. COMP2->CSR &= ~(uint32_t)COMP_CSR_COMP2INNSEL;
  36. COMP2->CSR |= COMP_CSR_COMP2INNSEL_2;
  37. /* invert polarity */
  38. COMP2->CSR |= COMP_CSR_COMP2POLARITY;
  39. /* comparator enable */
  40. COMP2->CSR |= COMP_CSR_COMP2EN;
  41. /* setup PWM mode for TIM22 */
  42. /* configure output compare for channel 1 of TIM22 */
  43. TIM22->CCMR1 &= ~(uint32_t)TIM_CCMR1_CC1S;
  44. /* configure pwm mode 1 */
  45. TIM22->CCMR1 &= ~(uint32_t)TIM_CCMR1_OC1M; /* clear mode to 000 */
  46. TIM22->CCMR1 |= TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1; /* pwm mode 1 (110) */
  47. TIM22->CCMR1 |= TIM_CCMR1_OC1PE; /* load modified CCR1 during update event only */
  48. TIM22->PSC = 0; /* run with max speed (2 MHz after reset) */
  49. TIM22->ARR = 20; /* period of 20 clocks (100KHz if sys clock is not modified */
  50. TIM22->CCR1 = 10; /* a value between 0 and ARR, which defines the duty cycle */
  51. /* output the result of channel 1 to PA6 */
  52. TIM22->CCER |= TIM_CCER_CC1E;
  53. /* do not invert the output polarity (this is also the default value) */
  54. TIM22->CCER &= ~(uint32_t)TIM_CCER_CC1P;
  55. /* use up counter (this is also the default value) */
  56. TIM22->CR1 &= ~(uint32_t)TIM_CR1_DIR;
  57. /* do not use "one pulse mode" (continues mode, this is also the default value) */
  58. TIM22->CR1 &= ~(uint32_t)TIM_CR1_OPM;
  59. /* always generate an update event (this is also default) */
  60. TIM22->CR1 &= ~(uint32_t)TIM_CR1_UDIS;
  61. /* update event can be caused by UG bit and overflow (this is default) */
  62. TIM22->CR1 &= ~(uint32_t)TIM_CR1_URS;
  63. /* enable the counter */
  64. TIM22->CR1 |= TIM_CR1_CEN;
  65. TIMx->CR1 |= TIM_CR1_CEN; /* (6) */
  66. TIMx->EGR |= TIM_EGR_UG; /* (7) */
  67. /* setup gated mode for TIM22 */
  68. /* (1) Configure channel 1 to detect low level on the TI1 input
  69. by writing CC1S = ‘01’,
  70. and configure the input filter duration by writing the IC1F[3:0]
  71. bits
  72. in the TIMx_CCMR1 register (if no filter is needed, keep
  73. IC1F=0000).*/
  74. /* (2) Select polarity by writing CC1P=1 in the TIMx_CCER register */
  75. /* (3) Configure the timer in gated mode by writing SMS=101
  76. Select TI1 as the trigger input source by writing TS=101
  77. in the TIMx_SMCR register.*/
  78. /* (4) Set prescaler to 4000-1 in order to get an increment each 250us */
  79. /* (5) Enable the counter by writing CEN=1 in the TIMx_CR1 register. */
  80. TIMx->CCMR1 |= TIM_CCMR1_CC1S_0; /* (1 */
  81. TIMx->CCER |= TIM_CCER_CC1P; /* (2) */
  82. TIMx->SMCR |= TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0 \
  83. | TIM_SMCR_TS_2 | TIM_SMCR_TS_0; /* (3) */
  84. TIMx->PSC = 3999; /* (4) */
  85. TIMx->CR1 |= TIM_CR1_CEN; /* (5) */
  86. }
  87. int main()
  88. {
  89. RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */
  90. __NOP();
  91. __NOP();
  92. GPIOA->MODER &= ~GPIO_MODER_MODE13; /* clear mode for PA13 */
  93. GPIOA->MODER |= GPIO_MODER_MODE13_0; /* Output mode for PA13 */
  94. GPIOA->OTYPER &= ~GPIO_OTYPER_OT_13; /* no Push/Pull for PA13 */
  95. GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED13; /* low speed for PA13 */
  96. GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD13; /* no pullup/pulldown for PA13 */
  97. GPIOA->BSRR = GPIO_BSRR_BR_13; /* atomic clr PA13 */
  98. SysTick->LOAD = 2000*500 - 1;
  99. SysTick->VAL = 0;
  100. SysTick->CTRL = 7; /* enable, generate interrupt (SysTick_Handler), do not divide by 2 */
  101. for(;;)
  102. ;
  103. }