ctimer.h 1.8 KB

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  1. #ifndef LPC8XX_CTIMER_H_
  2. #define LPC8XX_CTIMER_H_
  3. // Interrupt Register (IR) shifters
  4. #define MR0INT 0
  5. #define MR1INT 1
  6. #define MR2INT 2
  7. #define MR3INT 3
  8. #define CR0INT 4
  9. #define CR1INT 5
  10. #define CR2INT 6
  11. #define CR3INT 7
  12. // Timer Control Register (TCR) shifters
  13. #define CEN 0
  14. #define CRST 1
  15. // Match Control Register (MCR) shifters
  16. #define MR0I 0
  17. #define MR0R 1
  18. #define MR0S 2
  19. #define MR1I 3
  20. #define MR1R 4
  21. #define MR1S 5
  22. #define MR2I 6
  23. #define MR2R 7
  24. #define MR2S 8
  25. #define MR3I 9
  26. #define MR3R 10
  27. #define MR3S 11
  28. // Capture Control Register (CCR) shifters
  29. #define CAP0RE 0
  30. #define CAP0FE 1
  31. #define CAP0I 2
  32. #define CAP1RE 3
  33. #define CAP1FE 4
  34. #define CAP1I 5
  35. #define CAP2RE 6
  36. #define CAP2FE 7
  37. #define CAP2I 8
  38. #define CAP3RE 9
  39. #define CAP3FE 10
  40. #define CAP3I 11
  41. // External Match Register (EMR) shifters
  42. #define EM0 0
  43. #define EM1 1
  44. #define EM2 2
  45. #define EM3 3
  46. #define EMC0 4
  47. #define EMC1 6
  48. #define EMC2 8
  49. #define EMC3 10
  50. // EMR bit fields
  51. #define DO_NOTHING_ON_MATCH 0x0
  52. #define CLEAR_ON_MATCH 0x1
  53. #define SET_ON_MATCH 0x2
  54. #define TOGGLE_ON_MATCH 0x3
  55. // Count Control Register (CTCR) shifters
  56. #define CTMODE 0
  57. #define CINSEL 2
  58. #define ENCC 4
  59. #define SELCC 5
  60. // CTCR bit fields
  61. #define TIMER_MODE 0x0
  62. #define COUNTER_MODE_RISING 0x1
  63. #define COUNTER_MODE_FALLING 0x2
  64. #define COUNTER_MODE_BOTH 0x3
  65. #define CLEAR_ON_CAP0_RISING 0x0
  66. #define CLEAR_ON_CAP0_FALLING 0x1
  67. #define CLEAR_ON_CAP1_RISING 0x2
  68. #define CLEAR_ON_CAP1_FALLING 0x3
  69. #define CLEAR_ON_CAP2_RISING 0x4
  70. #define CLEAR_ON_CAP2_FALLING 0x5
  71. #define CLEAR_ON_CAP3_RISING 0x6
  72. #define CLEAR_ON_CAP3_FALLING 0x7
  73. // PWM Control Register (PWMC) shifters
  74. #define PWMEN0 0
  75. #define PWMEN1 1
  76. #define PWMEN2 2
  77. #define PWMEN3 3
  78. #endif // LPC8XX_CTIMER_H_