adc.h 2.3 KB

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  1. /*
  2. * lpc8xx_adc.h
  3. *
  4. * Created on: This day, August 18, 2016
  5. * Author: The Creator
  6. */
  7. #ifndef LPC8XX_ADC_H_
  8. #define LPC8XX_ADC_H_
  9. // CTRL register shifters
  10. #define ADC_CLKDIV 0
  11. #define ADC_LPWRMODE 10
  12. #define ADC_CALMODE 30
  13. // Sequence A and B control register shifters
  14. #define ADC_CHANNELS 0
  15. #define ADC_TRIGGER 12
  16. #define ADC_TRIGPOL 18
  17. #define ADC_SYNCBYPASS 19
  18. #define ADC_START 26
  19. #define ADC_BURST 27
  20. #define ADC_SINGLESTEP 28
  21. #define ADC_LOWPRIO 29
  22. #define ADC_MODE 30
  23. #define ADC_SEQ_ENA 31
  24. // ADC hardware trigger inputs
  25. #define NO_TRIGGER 0
  26. #define PININT0_IRQ 1
  27. #define PININT1_IRQ 2
  28. #define TIM0_MAT3 5
  29. #define CMP0_OUT_ADC 6
  30. #define GPIO_INT_BMATCH 7
  31. #define ARM_TXEV 8
  32. // Threshold compare register shifters
  33. #define THRLOW 15
  34. #define THRHIGH 15
  35. // INTEN register shifters
  36. #define SEQA_INTEN 0
  37. #define SEQB_INTEN 1
  38. #define OVR_INTEN 2
  39. #define ADCMPINTEN0 3
  40. #define ADCMPINTEN1 5
  41. #define ADCMPINTEN2 7
  42. #define ADCMPINTEN3 9
  43. #define ADCMPINTEN4 11
  44. #define ADCMPINTEN5 13
  45. #define ADCMPINTEN6 15
  46. #define ADCMPINTEN7 17
  47. #define ADCMPINTEN8 19
  48. #define ADCMPINTEN9 21
  49. #define ADCMPINTEN10 23
  50. #define ADCMPINTEN11 25
  51. // FLAGS register shifters
  52. #define ADC_THCMP0 0
  53. #define ADC_THCMP1 1
  54. #define ADC_THCMP2 2
  55. #define ADC_THCMP3 3
  56. #define ADC_THCMP4 4
  57. #define ADC_THCMP5 5
  58. #define ADC_THCMP6 6
  59. #define ADC_THCMP7 7
  60. #define ADC_THCMP8 8
  61. #define ADC_THCMP9 9
  62. #define ADC_THCMP10 10
  63. #define ADC_THCMP11 11
  64. #define ADC_OVERRUN0 12
  65. #define ADC_OVERRUN1 13
  66. #define ADC_OVERRUN2 14
  67. #define ADC_OVERRUN3 15
  68. #define ADC_OVERRUN4 16
  69. #define ADC_OVERRUN5 17
  70. #define ADC_OVERRUN6 18
  71. #define ADC_OVERRUN7 19
  72. #define ADC_OVERRUN8 20
  73. #define ADC_OVERRUN9 21
  74. #define ADC_OVERRUN10 22
  75. #define ADC_OVERRUN11 23
  76. #define ADC_SEQA_OVR 24
  77. #define ADC_SEQB_OVR 25
  78. #define ADC_SEQA_INT 28
  79. #define ADC_SEQB_INT 29
  80. #define ADC_THCMP_INT 30
  81. #define ADC_OVR_INT 31
  82. // TRM register shifters
  83. #define ADC_VRANGE 5
  84. #endif /* LPC8XX_ADC_H_ */