main.c 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187
  1. /*
  2. Example for the STM32L031 Eval Board with 128x64 OLED at PA13/PA14
  3. */
  4. #include <stdio.h>
  5. #include "stm32l031xx.h"
  6. #include "delay.h"
  7. #include "u8x8.h"
  8. /*=======================================================================*/
  9. /* external functions */
  10. uint8_t u8x8_gpio_and_delay_stm32l0(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr);
  11. /*=======================================================================*/
  12. /* global variables */
  13. u8x8_t u8x8; // u8x8 object
  14. uint8_t u8x8_x, u8x8_y; // current position on the screen
  15. volatile unsigned long SysTickCount = 0;
  16. /*=======================================================================*/
  17. void __attribute__ ((interrupt, used)) SysTick_Handler(void)
  18. {
  19. SysTickCount++;
  20. }
  21. void setHSIClock()
  22. {
  23. /* test if the current clock source is something else than HSI */
  24. if ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
  25. {
  26. /* enable HSI */
  27. RCC->CR |= RCC_CR_HSION;
  28. /* wait until HSI becomes ready */
  29. while ( (RCC->CR & RCC_CR_HSIRDY) == 0 )
  30. ;
  31. /* enable the HSI "divide by 4" bit */
  32. RCC->CR |= (uint32_t)(RCC_CR_HSIDIVEN);
  33. /* wait until the "divide by 4" flag is enabled */
  34. while((RCC->CR & RCC_CR_HSIDIVF) == 0)
  35. ;
  36. /* then use the HSI clock */
  37. RCC->CFGR = (RCC->CFGR & (uint32_t) (~RCC_CFGR_SW)) | RCC_CFGR_SW_HSI;
  38. /* wait until HSI clock is used */
  39. while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
  40. ;
  41. }
  42. /* disable PLL */
  43. RCC->CR &= (uint32_t)(~RCC_CR_PLLON);
  44. /* wait until PLL is inactive */
  45. while((RCC->CR & RCC_CR_PLLRDY) != 0)
  46. ;
  47. /* set latency to 1 wait state */
  48. FLASH->ACR |= FLASH_ACR_LATENCY;
  49. /* At this point the HSI runs with 4 MHz */
  50. /* Multiply by 16 device by 2 --> 32 MHz */
  51. RCC->CFGR = (RCC->CFGR & (~(RCC_CFGR_PLLMUL| RCC_CFGR_PLLDIV ))) | (RCC_CFGR_PLLMUL16 | RCC_CFGR_PLLDIV2);
  52. /* enable PLL */
  53. RCC->CR |= RCC_CR_PLLON;
  54. /* wait until the PLL is ready */
  55. while ((RCC->CR & RCC_CR_PLLRDY) == 0)
  56. ;
  57. /* use the PLL has clock source */
  58. RCC->CFGR |= (uint32_t) (RCC_CFGR_SW_PLL);
  59. /* wait until the PLL source is active */
  60. while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL)
  61. ;
  62. SystemCoreClockUpdate(); /* Update SystemCoreClock global variable */
  63. }
  64. /*
  65. Enable several power regions: PWR, GPIOA
  66. This must be executed after each reset.
  67. */
  68. void startUp(void)
  69. {
  70. RCC->IOPENR |= RCC_IOPENR_IOPAEN; /* Enable clock for GPIO Port A */
  71. RCC->APB1ENR |= RCC_APB1ENR_PWREN; /* enable power interface (PWR) */
  72. PWR->CR |= PWR_CR_DBP; /* activate write access to RCC->CSR and RTC */
  73. SysTick->LOAD = (SystemCoreClock/1000)*50 - 1; /* 50ms task */
  74. SysTick->VAL = 0;
  75. SysTick->CTRL = 7; /* enable, generate interrupt (SysTick_Handler), do not divide by 2 */
  76. }
  77. /*=======================================================================*/
  78. /* u8x8 display procedures */
  79. void initDisplay(void)
  80. {
  81. u8x8_Setup(&u8x8, u8x8_d_ssd1306_128x64_noname, u8x8_cad_ssd13xx_i2c, u8x8_byte_sw_i2c, u8x8_gpio_and_delay_stm32l0);
  82. u8x8_InitDisplay(&u8x8);
  83. u8x8_ClearDisplay(&u8x8);
  84. u8x8_SetPowerSave(&u8x8, 0);
  85. u8x8_SetFont(&u8x8, u8x8_font_amstrad_cpc_extended_r);
  86. u8x8_x = 0;
  87. u8x8_y = 0;
  88. }
  89. void outChar(uint8_t c)
  90. {
  91. if ( u8x8_x >= u8x8_GetCols(&u8x8) )
  92. {
  93. u8x8_x = 0;
  94. u8x8_y++;
  95. }
  96. u8x8_DrawGlyph(&u8x8, u8x8_x, u8x8_y, c);
  97. u8x8_x++;
  98. }
  99. void outStr(const char *s)
  100. {
  101. while( *s )
  102. outChar(*s++);
  103. }
  104. void outHexHalfByte(uint8_t b)
  105. {
  106. b &= 0x0f;
  107. if ( b < 10 )
  108. outChar(b+'0');
  109. else
  110. outChar(b+'a'-10);
  111. }
  112. void outHex8(uint8_t b)
  113. {
  114. outHexHalfByte(b >> 4);
  115. outHexHalfByte(b);
  116. }
  117. void outHex16(uint16_t v)
  118. {
  119. outHex8(v>>8);
  120. outHex8(v);
  121. }
  122. void outHex32(uint32_t v)
  123. {
  124. outHex16(v>>16);
  125. outHex16(v);
  126. }
  127. void setRow(uint8_t r)
  128. {
  129. u8x8_x = 0;
  130. u8x8_y = r;
  131. }
  132. /*=======================================================================*/
  133. int main()
  134. {
  135. setHSIClock(); /* enable 32 MHz Clock */
  136. startUp(); /* enable systick irq and several power regions */
  137. initDisplay(); /* aktivate display */
  138. setRow(0); outStr("Hello World!");
  139. setRow(2); outStr("RCC_CSR:"); outHex32(RCC->CSR);
  140. setRow(3); outStr("PWR_CSR:"); outHex32(PWR->CSR);
  141. for(;;)
  142. {
  143. }
  144. }