ll_hw_drv.h 9.9 KB

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  1. /**************************************************************************************************
  2. Phyplus Microelectronics Limited confidential and proprietary.
  3. All rights reserved.
  4. IMPORTANT: All rights of this software belong to Phyplus Microelectronics
  5. Limited ("Phyplus"). Your use of this Software is limited to those
  6. specific rights granted under the terms of the business contract, the
  7. confidential agreement, the non-disclosure agreement and any other forms
  8. of agreements as a customer or a partner of Phyplus. You may not use this
  9. Software unless you agree to abide by the terms of these agreements.
  10. You acknowledge that the Software may not be modified, copied,
  11. distributed or disclosed unless embedded on a Phyplus Bluetooth Low Energy
  12. (BLE) integrated circuit, either as a product or is integrated into your
  13. products. Other than for the aforementioned purposes, you may not use,
  14. reproduce, copy, prepare derivative works of, modify, distribute, perform,
  15. display or sell this Software and/or its documentation for any purposes.
  16. YOU FURTHER ACKNOWLEDGE AND AGREE THAT THE SOFTWARE AND DOCUMENTATION ARE
  17. PROVIDED AS IS WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED,
  18. INCLUDING WITHOUT LIMITATION, ANY WARRANTY OF MERCHANTABILITY, TITLE,
  19. NON-INFRINGEMENT AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL
  20. PHYPLUS OR ITS SUBSIDIARIES BE LIABLE OR OBLIGATED UNDER CONTRACT,
  21. NEGLIGENCE, STRICT LIABILITY, CONTRIBUTION, BREACH OF WARRANTY, OR OTHER
  22. LEGAL EQUITABLE THEORY ANY DIRECT OR INDIRECT DAMAGES OR EXPENSES
  23. INCLUDING BUT NOT LIMITED TO ANY INCIDENTAL, SPECIAL, INDIRECT, PUNITIVE
  24. OR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF PROCUREMENT
  25. OF SUBSTITUTE GOODS, TECHNOLOGY, SERVICES, OR ANY CLAIMS BY THIRD PARTIES
  26. (INCLUDING BUT NOT LIMITED TO ANY DEFENSE THEREOF), OR OTHER SIMILAR COSTS.
  27. **************************************************************************************************/
  28. #ifndef _LL_HW_DRV_H_
  29. #define _LL_HW_DRV_H_
  30. #include "types.h"
  31. #include "ll_def.h"
  32. #include "ap_cp.h"
  33. #include "rf_phy_driver.h"
  34. // LL_HW_REGISTER_ADDRESS
  35. #define BB_HW_BASE 0x40030000 //BB_HW Base address
  36. #define LL_HW_BASE 0x40031000 //LL_HW Base address
  37. #define LL_HW_TFIFO (LL_HW_BASE+0x400)
  38. #define LL_HW_RFIFO (LL_HW_BASE+0xC00)
  39. #define LL_HW_WRT_EMPTY_PKT *(volatile uint32_t *)(LL_HW_TFIFO) = 0x00000001
  40. //LL_HW_MODE
  41. #define LL_HW_STX 0x0000
  42. #define LL_HW_SRX 0x0001
  43. #define LL_HW_TRX 0x0010
  44. #define LL_HW_RTX 0x0012
  45. #define LL_HW_TRLP 0x0020
  46. #define LL_HW_TRLP_EMPT 0x0022
  47. #define LL_HW_RTLP 0x0030
  48. #define LL_HW_RTLP_1ST 0x0031
  49. #define LL_HW_RTLP_EMPT 0x0032
  50. #define HCLK16M
  51. //#define LL_HW_CYCLES_PER_US CYCLES_PER_US
  52. #ifdef HCLK16M
  53. #define LL_HW_HCLK_PER_US 16 //
  54. #define LL_HW_HCLK_PER_US_BITS 4
  55. #else
  56. #define LL_HW_HCLK_PER_US 32 //
  57. #define LL_HW_HCLK_PER_US_BITS 5
  58. #endif
  59. #define LL_HW_FIFO_MARGIN 70 //
  60. // LL_HW_IRQ_STATUS
  61. #define LIRQ_MD 0x0001 //bit00
  62. #define LIRQ_CERR 0x0002 //bit01
  63. #define LIRQ_RTO 0x0004 //bit02
  64. #define LIRQ_RFULL 0x0008 //bit03
  65. #define LIRQ_RHALF 0x0010 //bit04
  66. #define LIRQ_BIT5 0x0020 //bit05
  67. #define LIRQ_BIT6 0x0040 //bit06
  68. #define LIRQ_BIT7 0x0080 //bit07
  69. #define LIRQ_TD 0x0100 //bit08
  70. #define LIRQ_RD 0x0200 //bit09
  71. #define LIRQ_COK 0x0400 //bit10
  72. #define LIRQ_CERR2 0x0800 //bit11
  73. #define LIRQ_LTO 0x1000 //bit12
  74. #define LIRQ_NACK 0x2000 //bit13
  75. #define LIRQ_BIT14 0x4000 //bit14
  76. #define LIRQ_BIT15 0x8000 //bit15
  77. #define LL_HW_IRQ_MASK 0x3FFF //total 14bit
  78. // LL_HW_RFIFO_CTRL
  79. #define LL_HW_IGN_EMP 0x0001 //bit0
  80. #define LL_HW_IGN_CRC 0x0002 //bit1
  81. #define LL_HW_IGN_SSN 0x0004 //bit2
  82. #define LL_HW_IGN_ALL 0x0007 //bit2
  83. #define LL_HW_IGN_NONE 0x0000
  84. // LL_MD_RX_INI
  85. #define LL_HW_MD_RX_SET0 0x4000 //set md_rx ini=0 and md_rx_soft=0
  86. #define LL_HW_MD_RX_SET1 0x4440 //set md_rx ini=1 and md_rx_soft=1
  87. //LL FIFO DEPTH CONFIG
  88. #define LL_HW_FIFO_TX_2K_RX_2K 0x0200 //TX FIFO 512 Word
  89. #define LL_HW_FIFO_TX_3K_RX_1K 0x0300 //TX FIFO 768 Word
  90. #define LL_HW_FIFO_TX_1K_RX_3K 0x0100 //TX FIFO 256 Word
  91. //BB CRC Format Setting
  92. #define LL_HW_CRC_BLE_FMT 0x02
  93. #define LL_HW_CRC_ZB_FMT 0x03
  94. #define LL_HW_CRC_16_FMT 0x04
  95. #define LL_HW_CRC_NULL 0x00
  96. //ANT SWITCH SLOT
  97. #define LL_HW_ANT_WIN_1us 4
  98. #define LL_HW_ANT_SW_CTE_OFF 0x00
  99. #define LL_HW_ANT_SW_CTE_AUTO 0x01
  100. #define LL_HW_ANT_SW_TX_MANU 0x02
  101. #define LL_HW_ANT_SW_RX_MANU 0x04
  102. //CTE Supplement Config
  103. #define CTE_SUPP_AUTO 0xC0
  104. #define CTE_SUPP_LEN_SET 0x00
  105. #define CTE_SUPP_NULL 0x00
  106. #define CONNLESS_CTE_TYPE_AOA 0x00
  107. #define CONNLESS_CTE_TYPE_AOD_1us 0x01
  108. #define CONNLESS_CTE_TYPE_AOD_2us 0x02
  109. #define CONN_CTE_TYPE_AOA 0x01
  110. #define CONN_CTE_TYPE_AOD_1us 0x02
  111. #define CONN_CTE_TYPE_AOD_2us 0x04
  112. // 2020-01-21 add for CONN CTE REQ TYPE
  113. #define CTE_REQ_TYPE_AOA 0x00
  114. #define CTE_REQ_TYPE_AOD_1US 0x01
  115. #define CTE_REQ_TYPE_AOD_2US 0x02
  116. #define BLE_HEAD_WITH_CTE(x) (((x & 0x20)==0x00) ? 0:1)
  117. void ll_hw_set_stx(void);
  118. void ll_hw_set_srx(void);
  119. void ll_hw_set_trx(void);
  120. void ll_hw_set_rtx(void);
  121. void ll_hw_set_trlp(uint8_t snNesn,uint8_t txPktNum,uint8_t rxPktNum,uint8_t mdRx);
  122. void ll_hw_set_rtlp(uint8_t snNesn,uint8_t txPktNum,uint8_t rxPktNum,uint8_t mdRx,uint32_t rdCntIni);
  123. void ll_hw_set_rtlp_1st(uint8_t snNesn,uint8_t txPktNum,uint8_t rxPktNum,uint8_t mdRx);
  124. void ll_hw_config(uint8_t ll_mode,uint8_t snNesn,uint8_t txPktNum,uint8_t rxPktNum,uint8_t mdRx,uint32_t rdCntIni);
  125. void ll_hw_go(void);
  126. void ll_hw_trigger(void);
  127. void ll_hw_clr_irq(void);
  128. void ll_hw_set_irq(uint32_t mask);
  129. void ll_hw_set_empty_head(uint16_t txHeader);
  130. void ll_hw_set_rx_timeout_1st(uint32_t rxTimeOut);
  131. void ll_hw_set_rx_timeout(uint32_t rxTimeOut);
  132. void ll_hw_set_tx_rx_release(uint16_t txTime,uint16_t rxTime);
  133. void ll_hw_set_rx_tx_interval(uint32_t intvTime);
  134. void ll_hw_set_tx_rx_interval(uint32_t intvTime);
  135. void ll_hw_set_trx_settle(uint8_t tmBb,uint8_t tmAfe,uint8_t tmPll);
  136. void ll_hw_set_loop_timeout(uint32_t loopTimeOut);
  137. void ll_hw_set_loop_nack_num(uint8_t nAckNum);
  138. void ll_hw_set_timing(uint8_t pktFmt);
  139. void ll_hw_set_tfifo_space(uint16 space);
  140. void ll_hw_set_ant_switch_mode(uint8_t mode);
  141. void ll_hw_set_ant_switch_timing(uint8_t antWin,uint8_t antDly);
  142. void ll_hw_set_ant_pattern(uint32_t ant1, uint32_t ant0);
  143. void ll_hw_set_cte_rxSupp(uint8_t rxSupp);
  144. void ll_hw_set_cte_txSupp(uint8_t txSupp);
  145. uint8_t ll_hw_get_iq_RawSample(uint16_t* p_iSample, uint16_t* p_qSample);
  146. void ll_hw_rst_rfifo(void);
  147. void ll_hw_rst_tfifo(void);
  148. void ll_hw_ign_rfifo(uint8_t ignCtrl);
  149. void ll_hw_get_tfifo_info(int* rdPtr,int* wrPtr,int* wrDepth);
  150. void ll_hw_get_rfifo_info(int* rdPtr,int* wrPtr,int* rdDepth);
  151. void ll_hw_get_rxPkt_stats(uint8_t *crcErrNum,uint8_t *rxTotalNum,uint8_t *rxPktNum);
  152. uint8_t ll_hw_read_rfifo(uint8_t* rxPkt, uint16_t* pktLen, uint32_t* pktFoot0, uint32_t* pktFoot1);
  153. uint8_t ll_hw_read_rfifo_zb(uint8_t* rxPkt, uint16_t* pktLen, uint32_t* pktFoot0, uint32_t* pktFoot1);
  154. uint8_t ll_hw_read_rfifo_pplus(uint8_t* rxPkt, uint16_t* pktLen, uint32_t* pktFoot0, uint32_t* pktFoot1);
  155. uint8_t ll_hw_write_tfifo(uint8_t* rxPkt, uint16_t pktLen);
  156. void ll_hw_set_crc_fmt(uint8_t txCrc,uint8_t rxCrc);
  157. void ll_hw_set_pplus_pktfmt(uint8_t plen);
  158. uint8_t ll_hw_get_snNesn(void);
  159. uint8_t ll_hw_get_txAck(void);
  160. uint8_t ll_hw_get_nAck(void);
  161. uint8_t ll_hw_get_rxPkt_num(void);
  162. uint32_t ll_hw_get_anchor(void);
  163. uint32_t ll_hw_get_irq_status(void);
  164. uint8_t ll_hw_get_fsm_status(void);
  165. uint8_t ll_hw_get_last_ack(void);
  166. uint32_t ll_hw_get_loop_cycle(void);
  167. uint8_t ll_hw_get_rxPkt_Total_num(void);
  168. uint8_t ll_hw_get_rxPkt_CrcErr_num(void);
  169. uint8_t ll_hw_get_rxPkt_CrcOk_num(void);
  170. uint8_t ll_hw_get_iq_RawSample(uint16_t* p_iSample, uint16_t* p_qSample);
  171. uint8_t ll_hw_update_rtlp_mode(uint8_t llMode);
  172. uint8_t ll_hw_update_trlp_mode(uint8_t llMode);
  173. uint8_t ll_hw_update(uint8_t llMode,uint8_t *txAck,uint8_t *rxRec,uint8_t *snNesn);
  174. void byte_to_bit(uint8_t byteIn,uint8_t* bitOut);
  175. void bit_to_byte(uint8_t* bitIn,uint8_t * byteOut);
  176. void zigbee_crc16_gen(uint8_t *dataIn,int length,uint8_t *seed,uint8_t *crcCode);
  177. // copy from rf.h by Zeng jiaping
  178. void set_tx_rx_mode(uint8_t mode);
  179. void set_channel(uint32_t channel);
  180. void set_access_address( uint32_t access);
  181. void set_crc_seed(uint32_t seed);
  182. void set_whiten_seed(uint32_t channel);
  183. void set_max_length(uint32_t length);
  184. void calculate_whiten_seed(void);
  185. #endif